It is widely-known that coupling exists between adjacent through-silicon vias (TSVs) in 3D ICs. Since this TSVto-TSV coupling is not negligible, it is highly likely that TSVto-TSV coupling affects crosstalk significantly. Although a few works have already analyzed coupling in 3D ICs, they used Sparameter-based methods under the assumption that all ports in their simulation structures are under 50-Ω termination condition. However, this 50-Ω termination condition does not occur at ports (pins) of gates inside a 3D IC. In this paper, therefore, we analyze TSV-to-TSV coupling in 3D ICs based on a lumped circuit model with a realistic high-impedance termination condition. We also analyze how channel affect TSV-to-TSV coupling differently in different frequency ranges. Based on our results, we propose a technique to reduce TSV-to-TSV coupling in 3D ICs.
17 Figures and Tables
Fig. 1. A simplified model of TSVs and I/Os in 3D IC.
Fig. 10. Coupling path in the low frequency region.
Fig. 11. Crosstalk voltage of 100MHz digital signal when the distance between TSV is 10um, and 30um (1× driver).
Fig. 12. Coupling path in the middle frequency region
Fig. 13. Crosstalk voltage of 3GHz digital signal when the distance between TSV is 10um, and 30um (1× driver).
Fig. 14. Coupling path in the high frequency region
Fig. 15. Frequency dependency on TSV coupling to distance on high impedance termination: (I) low frequency, (II) middle frequency, (III) high frequency.
Fig. 16. Crosstalk voltage of 1GHz digital signal when distance and gate size have changed.
Fig. 2. Equivalent lumped circuit model for the TSV channel.
Fig. 3. Coupling coefficients obtained from a 3D simulator model and our lumped circuit model when the TSV-to-TSV distance is 10µm. (a) Linear scale, (b) Log Scale
Fig. 4. Crosstalk voltage observed at port3 when 1.2V, 1GHz digital signal inserted to port1. (1× driver, TSV-to-TSV distance: 10µm.)
Fig. 5. (a) Impedance level of each component in the lumped circuit model, (b) Simplified model for coupling analysis.
Fig. 6. Coupling coefficients of the 50Ω termination condition (solid line) and the high impedance termination (1× driver, dotted line) condition.
Fig. 7. Impact of GND capacitance in TSV coupling channel.
Fig. 8. Visualization of a driver strength, load impedance, and the relationship between the aggressor and the victim.
Fig. 9. Impedance difference between the silicon substrate channel, and the gate capacitance in different regions: (I) low frequency (< 1GHz), (II) middle frequency (1GHz to 8GHz), (III) high frequency (> 8GHz).
TABLE I ELECTRICAL PARAMETERS USED IN THIS PAPER
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